1. Field of the Art
The present invention relates to CCD (Charge Coupled Device) image sensors and more particularly, to a CCD image sensor which selectively outputs either normal or mirror images.
2. Background of the Related Art
CCD's store charges in a silicon substrate above which is disposed an SiO.sub.2 insulator layer. Above the insulator layer are disposed many fine adjacent electrodes. If one of the electrodes is biased to a higher voltage than the neighboring electrodes, a potential well that is capable of storing charges is formed in the silicon substrate below the selected electrode. If the voltage at this electrode is lowered and the voltage at one of the neighboring electrodes is raised, the corresponding neighboring potential well becomes deeper and the charges flow into the neighboring potential well. By repeating this operation, the charges are sequentially transferred from potential well to neighboring potential well by external signals applied to the electrodes.
Solid image sensors utilize CCD's and are categorized according to the construction of a light-receiving element, which element converts incident light charge, and the type of CCD transfer element. The primary types are: IT-CCD type and FT-CCD type. Variation also exist, such as the FIT-CCD type, which combines the IT-CCD and FT-CCD types.
Such image sensors are used in, for example, video tape recorder cameras. This requires miniaturization, high quality, and high functional features for the CCD image sensor. One of the most desired functions, especially to monitoring television cameras, is a mirror image, i.e., a left and right inverse image, primarily for monitoring from the back side.
FIG. 1 shows a structural diagram of a two-output IT-CCD image sensor capable of outputting normal and mirror images according to the known technology. The conventional CCD image sensor consists o photodiodes 13 for generating signal charges proportional to the intensity of an incident light, vertical transfer CCD's 11 (VCCD) for transferring he signal charges in a vertical direction, horizontal transfer CCD's 15 (HCCD) for transferring the signal charges in a horizontal direction and two output circuits 17 and 19. Transfer gates 12 couple the photodiodes to the VCCDs. Clock signals H1-H4 drive four unit gates of the HCCD 15.
In the prior-art CCD image sensor, the mirror image can be obtained by inverting the direction of the charge transfer of the HCCD 15. Thus, the normal image is output in the solid line direction, while the mirror image is output in the dotted line direction. In order to simultaneously obtain both normal and mirror images in the prior-art CCD image sensor, two output circuits 17 and 19 are required at each end of the HCCD 15.
A single-output CCD image sensor having both normal and mirror images has also been proposed (1991 ITE Annual Convention P. 31-32). FIG. 2 shows a structural diagram of such a single-output CCD image sensor. VCCD's 21 are arrayed in each row and photodiodes 23 are arrayed in the column direction and connected through the transfer gates to the VCCD's 21 in each row. A HCCD 25 is connected to one end of the VCCD's in each row and has upper and lower parts 25a and 25b, connected by a rotating element 25c. An output circuit 27 is connected to one end of the mixing element 25d, and the clock signals H1-H4 are applied to the four gates formed in the HCCD 25.
In the normal image transfer mode, the signals generated from the photodiodes arrayed in each column C1-C4 are transferred through the transfer gates 22 to the respective VCCD's 21 in each row R1-R4. After that, the signals of VCCD's 21 in the first row R1, one from each column, are transferred to the upper HCCD 25a. The signals of VCCD's 21 in the second row R2, one from each column, are transferred to the empty VCCD's 21 of the first row R1. Similarly, the signals of VCCD's 21 in the third row R3 are transferred to the empty VCCD's 21 in the second row R2 and the signals of VCCD's 21 in the fourth row R4 are then transferred to the third row R3. The signals from the first row, transferred to the upper HCCD 25a, are then transferred in the solid line direction using a first combination of clock signals H1-H4 and sequentially transferred to the output circuit 27 through the mixing element 25d. Thus, the output circuit 27 sequentially outputs the first column signal of the first row R1C1, the second column signal of the first row R1C2, the third column signal of the first row R1C3 and the fourth column signal of the first row R1C4. The signals from the second, the third, and fourth rows are then sequentially output in the same manner.
In the mirror image transfer mode, the signals generated from the photodiodes arrayed in each column C1-C4 are transferred through the transfer gates 22 to the respective VCCD's 21 in each row R1-R4. As in the normal transfer mode, the signals in the first row R1 of VCCD's 21 are transferred to the upper HCCD 25a and the signals in the respective second, third and fourth rows are transferred a single row down. However, the signals from the first row R1, that have been transferred to the upper HCCD 25a are then transferred in the dotted line direction by a second combination of clock signals H1-H4 and provided to the output circuit 27 via the rotating element 25c, the lower HCCD 25b and the mixing element 25d. Thus, the output circuit 27 sequentially outputs the fourth column signal of the first row R1C4, the third column signal of the first row R1C3, the second column signal of the first row R1C2 and the first column signal of the first row R1C1. The signals of the second, the third, and the fourth rows are then sequentially output in the same manner.
This particular prior-art single output CCD image sensor advantageously consumes smaller amounts of current due to the single output circuit and its peripheral circuits are simplified due to the simplified output. However, this particular CCD image sensor requires applying a very complex combination of the clock signals to the upper HCCD in order to change the transfer direction. Additional clock signals are also needed in the mixing element to prevent incorrect signal transfer. This complexity thus creates quality problems of its own.